This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
Various integrated circuit (IC) technologies have been developed which allow multiple IC layers or dies to be positioned in a vertical direction. In particular, in three-dimensional (3D) ICs, a number of IC layers or dies may be stacked in a vertical direction, where various coupling schemes may be used to stack the layers or dies together and to connect the layers or dies to package substrates. Such coupling schemes may include one or more vias used to provide inter-layer communication in the vertical direction.